A428316S-25 Ver la hoja de datos (PDF) - AMIC Technology
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A428316S-25 Datasheet PDF : 23 Pages
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A428316 Series
AC Characteristics (continued) (VCC = 5.0V ± 10%, VSS = 0V, Ta = 0°C to +70°C or -40°C to +85°C)
Test Conditions:
Input timing reference level: VIH/VIL=2.4V/0.8V
Output reference level: VOH/VOL=2.0V/0.8V
Output Load: 2TTL gate + CL (50pF)
Assumed tT=2ns
Std
# Symbol
Parameter
44
tCP
CAS Precharge Time
45 tPCM EDO Page Mode RMW Cycle Time
46 tCRW EDO Page Mode CAS Pulse Width (RMW)
47 tRASP RAS Pulse Width (EDO Page)
48
tCSR
CAS Setup Time ( CAS -before- RAS )
49
tCHR
CAS Hold Time ( CAS -before- RAS )
50
tRPC
RAS to CAS Precharge Time
51
tOEZ
Output Buffer Turn-off Delay from OE
-25
-35
Unit Notes
Min. Max. Min. Max.
4
-
6
-
ns
32
-
40
-
ns
24
-
30
-
ns
30 200K 35 200K ns
5
-
5
-
ns
3
7
-
10
-
ns
3
10
-
10
-
ns
3
-
3
-
3
ns
8
Notes:
1. ICC1, ICC3, ICC4, and ICC5 depend on cycle rate.
2. ICC1 and ICC4 depend on output loading. Specified values are obtained with the outputs open.
3. An initial pause of 200μs is required after power-up followed by any 8 RAS cycles before proper device operation is
achieved. In the case of an internal refresh counter, a minimum of 8 CAS -before- RAS initialization cycles instead of 8
RAS cycles are required. 8 initialization cycles are required after extended periods of bias without clocks.
4. AC Characteristics assume tT = 2ns. All AC parameters are measured with a load equivalent to two TTL loads and
50pF, VIL (min.) ≥ GND and VIH (max.) ≤ VCC.
5. VIH (min.) and VIL (max.) are reference levels for measuring timing of input signals. Transition times are measured
between VIH and VIL.
6. Operation within the tRCD (max.) limit insures that tRAC (max.) can be met. tRCD (max.) is specified as a reference
point only. If tRCD is greater than the specified tRCD (max.) limit, then access time is controlled exclusively by tCAC.
7. Operation within the tRAD (max.) limit insures that tRAC (max.) can be met. tRAD (max.) is specified as a reference
point only. If tRAD is greater than the specified tRAD (max.) limit, then access time is controlled exclusively by tAA.
8. Assumes three state test load (5pF and a 500Ω Thevenin equivalent).
9. Either tRCH or tRRH must be satisfied for a read cycle.
10. tOFF (max.) defines the time at which the output achieves the open circuit condition; it is not referenced to output
voltage levels.
11. tWCS, tWCH, tRWD, tCWD and tAWD are not restrictive operating parameters. They are included in the data sheet
as electrical characteristics only. If tWCS ≥ tWCS (min.) and tWCH ≥ tWCH (min.), the cycle is an early write cycle
and data-out pins will remain open circuit, high impedance, throughout the entire cycle. If tRWD ≥ tRWD (min.) , tCWD ≥
tCWD (min.) and tAWD ≥ tAWD (min.), the cycle is a read-modify-write cycle and the data out will contain data read from
the selected cell. If neither of the above conditions is satisfied, the condition of the data out at access time is
indeterminate.
12. These parameters are referenced to UCAS and LCAS leading edge in early write cycles and to WE leading edge in
read-modify-write cycles.
13. Access time is determined by the longer of tAA or tCAC or tCPA.
14. tASC ≥ tCP to achieve tPC (min.) and tCPA (max.) values.
(February, 2009, Version 1.2)
8
AMIC Technology, Corp.
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