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AIC3842CS Ver la hoja de datos (PDF) - Analog Intergrations

Número de pieza
componentes Descripción
Lista de partido
AIC3842CS
AIC
Analog Intergrations AIC
AIC3842CS Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
AIC3842
n BLOCK DIAGRAM
VCC 7
ZD
5 34V
GND
UVLO
S/R
5V
REF
Internal Bias
4
RT/CT
2
VFB
1
COMP
3
ISENSE
2.50V
OSC
Error Amp.
D1 D2 R2
VREF
Good
Logic
PWM
S
Latch
R
Z1 Current
1V Sense
comparator
8
Q1
6
Q2
VREF
5V/50mA
OUTPUT
n PIN DESCRIPTIONS
PIN 1: COMP
- This pin is the error amplifier
output and is made available for
loop compensation.
PIN 2: VFB
- This is the inverting input of the
error amplifier. It is normally
connected to the switching
power supply output through a
resistor divider.
PIN 3: ISENSE - A voltage proportional to
inductor current is connected to
this input. The PWM uses this
information to terminate the
output switch conduction.
PIN 4: RT/CT
- The oscillator frequency and
maximum output duty cycle are
programmed by connecting
resistor RT to VREF and capacitor
CT to ground. Operation to
500KHz is feasible.
PIN 5: GND-
This pin is the combined control
circuitry and power ground.
PIN 6:
OUTPUT- This output directly drives the
gate of a power MOSFET. Peak
currents up to 1A are sourced
and sunk by this pin.
PIN 7: VCC -
This pin is the positive supply of
the control IC.
PIN 8: VREF -
This is the reference output. It
provides charging current for
capacitor CT through resistor RT.
5

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