BS616LV1010ACG55(2008) Ver la hoja de datos (PDF) - Brilliance Semiconductor

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BS616LV1010ACG55
(Rev.:2008)

Very Low Power CMOS SRAM 64K X 16 bit

Brilliance Semiconductor 

READ CYCLE 2 (1,3,4)

CE

LB, UB

DOUT

READ CYCLE 3 (1, 4)

ADDRESS

OE

CE

LB, UB

DOUT

tACS

tBA

tBE

tCLZ(5)

tRC

tAA

tOE

tOLZ

tCLZ(5)

tBA

tBE

NOTES:

1. WE is high in read Cycle.

2. Device is continuously selected when CE = VIL.

3. Address valid prior to or coincident with CE transition low.

4. OE = VIL.

5. Transition is measured ± 500mV from steady state with CL = 5pF.

The parameter is guaranteed but not 100% tested.

BS616LV1010

tCHZ(5)

tBDO

tOH

tOHZ(5)

tCHZ(1,5)

tBDO

R0201-BS616LV1010

6

Revision 2.7

Oct.

2008

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