BS616UV1010(2001) Ver la hoja de datos (PDF) - Brilliance Semiconductor
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BS616UV1010 Datasheet PDF : 10 Pages
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BSI
LOW VCC DATA RETENTION WAVEFORM ( CE Controlled )
Vcc
CE
Vcc
t CDR
VIH
Data Retention Mode
VDR ≥ 1.5V
CE ≥ Vcc - 0.2V
BS616UV1010
Vcc
tR
VIH
AC TEST CONDITIONS
KEY TO SWITCHING WAVEFORMS
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Vcc/0V
5ns
0.5Vcc
WAVEFORM
INPUTS
MUST BE
STEADY
OUTPUTS
MUST BE
STEADY
AC TEST LOADS AND WAVEFORMS
1333 Ω
2V
2V
OUTPUT
OUTPUT
1333 Ω
INCLUDING
JIG AND
SCOPE
100PF
2000 Ω
INCLUDING
JIG AND
SCOPE
5PF
2000 Ω
FIGURE 1A
FIGURE 1B
OUTPUT
THEVENIN EQUIVALENT
800 Ω
1.2V
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
,
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
ALL INPUT PULSES
Vcc
GND
10%
→
90% 90%
←
→
FIGURE 2
10%
← 5ns
AC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC, Vcc = 2.0V )
READ CYCLE
JEDEC
PARAMETER
NAME
PARAMETER
NAME
DESCRIPTION
BS616UV1010-15
MIN. TYP. MAX.
tAVAX
tRC
Read Cycle Time
150
--
--
tAVQV
tAA
Address Access Time
--
--
150
tELQV
t ACS
Chip Select Access Time
(CE)
--
--
150
tBA
tBA
Data Byte Control Access Time
(LB,UB)
--
--
150
tGLQV
tOE
Output Enable to Output Valid
--
--
80
tELQX
tCLZ
Chip Select to Output Low Z
(CE) 15
--
--
tBE
tBE
Data Byte Control to Output Low Z (LB,UB)
15
--
--
tGLQX
tOLZ
Output Enable to Output in Low Z
15
--
--
tEHQZ
tBDO
tCHZ
tBDO
Chip Deselect to Output in High Z
(CE)
0
Data Byte Control to Output High Z (LB,UB)
0
--
45
--
40
tGHQZ
tOHZ
Output Disable to Output in High Z
0
--
40
tAXOX
tOH
Output Disable to Output Address Change
15
--
--
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R0201-BS616UV1010
4
Revision 2.2
April 2001
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