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CDB6420 Ver la hoja de datos (PDF) - Cirrus Logic

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componentes Descripción
Lista de partido
CDB6420
Cirrus-Logic
Cirrus Logic Cirrus-Logic
CDB6420 Datasheet PDF : 52 Pages
First Prev 31 32 33 34 35 36 37 38 39 40 Next Last
PIN DESCRIPTIONS
AVDD
AGND
AO
NO
RST
DRDY
STROBE
DATA
NC1
NC2
1
20
2
19
3
18
4
17
5 CS6420 16
6
15
7
14
8
13
9
12
10
11
API
MB
APO
NI
DVDD
DGND
CLKI
CLKO
NC4
NC3
CS6420
Analog Interface
AO - Acoustic Interface Output, Pin 3
Analog voltage output for the acoustic side (near-end output/receive output). Maximum output
signal is 1 Vrms (2.8 Vpp). This output can drive down to 10 kand is usually followed by a
speaker driver. The output is pre-compensated to expect a single-pole RC low pass filter with a
corner frequency of 4 kHz.
NO - Network Interface Output, Pin 4
Analog voltage output for the network side (far-end output/transmit output). Maximum output
signal is 1 Vrms (2.8 Vpp). This output can drive down to 10 k. The output is pre-
compensated to expect a single-pole RC low pass filter with a corner frequency of 4 kHz.
API - Acoustic Interface Preamplifier Input, Pin 20
Input to the acoustic side microphone preamplifier. Signal source resistance at this pin will
reduce the 34 dB gain inherent in the preamplifier. The maximum signal without clipping is
20 mVrms (57 mVpp), assuming default settings.
APO - Acoustic Interface Preamplifier Output, Pin 18
Output of the acoustic side microphone preamplifier and input to the acoustic side analog-to-
digital converter (near-end input/transmit input). This input expects a single-pole RC anti-
aliasing filter with a corner frequency of 8 kHz. Maximum signal level before clipping at this
point is 1 Vrms (2.8 Vpp), assuming default settings for the Tx Analog Gain.
MB - Microphone Bias Voltage Output, Pin 19
Output of 3.5 VDC provides the internal voltage reference for the CS6420. MB must be
decoupled with a 10 µF and 0.1 µF capacitor to prevent noise from affecting the on-chip
voltage reference. MB must not be connected to any load.
DS205PP2
31

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