CY2305SXC-1(2008) Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY2305SXC-1 Datasheet PDF : 15 Pages
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CY2305
CY2309
Absolute Maximum Conditions
Supply Voltage to Ground Potential................–0.5V to +7.0V
DC Input Voltage (Except REF) ............ –0.5V to VDD + 0.5V
DC Input Voltage REF .........................................–0.5V to 7V
Storage Temperature ................................. –65°C to +150°C
Junction Temperature ................................................. 150°C
Static Discharge Voltage
(per MIL-STD-883, Method 3015) ........................... > 2,000V
Operating Conditions for CY2305SC-XX and CY2309SC-XX Commercial Temperature Devices
Parameter
Description
Min
Max
Unit
VDD
Supply Voltage
3.0
3.6
V
TA
Operating Temperature (Ambient Temperature)
0
70
°C
CL
Load Capacitance, below 100 MHz
–
30
pF
CL
Load Capacitance, from 100 MHz to 133 MHz
–
10
pF
CIN
Input Capacitance
–
7
pF
tPU
Power up time for all VDDs to reach minimum specified voltage
0.05
50
ms
(power ramps must be monotonic)
Electrical Characteristics for CY2305SC-XX and CY2309SC-XX Commercial Temperature
Devices
Parameter
Description
Test Conditions
Min
VIL
Input LOW Voltage[5]
–
VIH
Input HIGH Voltage[5]
2.0
IIL
Input LOW Current
VIN = 0V
–
IIH
Input HIGH Current
VIN = VDD
–
VOL
Output LOW Voltage[6]
IOL = 8 mA (–1)
–
IOH = 12 mA (–1H)
VOH
Output HIGH Voltage[6]
IOH = –8 mA (–1)
2.4
IOL = –12 mA (–1H)
IDD (PD mode) Power Down Supply Current REF = 0 MHz
–
IDD
Supply Current
Unloaded outputs at 66.67 MHz,
–
SEL inputs at VDD
Max
0.8
–
50.0
100.0
0.4
–
25.0
32.0
Unit
V
V
μA
μA
V
V
μA
mA
Switching Characteristics for CY2305SC-1 and CY2309SC-1 Commercial Temperature
Devices
Parameter[7]
Name
Test Conditions
Min Typ. Max
Unit
t1
Output Frequency
30-pF load
10 pF load
10
–
100
MHz
10
133.33
MHz
tDC
Duty Cycle[6] = t2 ÷ t1
Measured at 1.4V, Fout = 66.67 40.0 50.0 60.0
%
MHz
t3
Rise Time[6]
Measured between 0.8V and
–
–
2.50
ns
2.0V
t4
Fall Time[6]
Measured between 0.8V and
–
–
2.50
ns
2.0V
t5
Output to Output Skew[6]
All outputs equally loaded
–
85
250
ps
t6A
Delay, REF Rising Edge to
CLKOUT Rising Edge[6]
Measured at VDD/2
–
0
±350
ps
Notes
5. REF input has a threshold voltage of VDD/2.
6. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Document #: 38-07140 Rev. *I
Page 4 of 15
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