Switching Waveforms (continued)
Write Cycle No. 2 (CE Controlled)[8, 12, 13]
ADDRESS
CE
WE
tSA
tAW
DATA IN
DATA I/O
DATA UNDEFINED
tWC
tSCE
tHA
tPWE
tSD
DATA IN VALID
tHZWE
tHD
HIGH IMPEDANCE
Notes:
12. Data I/O pins enter high-impedance state, as shown, when OE is held LOW during write.
13. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
CY7C128A
C128A–9
Document #: 38-05028 Rev. *A
Page 5 of 9
[+] Feedback