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L80227

10BASE-T/100BASE-TX Ethernet PHY

Unspecified 

Contents

Chapter 1

Introduction

1.1 Overview

1.2 Features

Chapter 2

Functional Description

2.1

2.2

2.3

2.4

2.5

Device Differences

Overview

2.2.1 Channel Operation

2.2.2 Data Paths

Block Diagram Description

2.3.1 Oscillator and Clock

2.3.2 Controller Interface

2.3.3 Encoder

2.3.4 Decoder

2.3.5 Scrambler

2.3.6 Descrambler

2.3.7 Twisted-Pair Transmitters

2.3.8 Twisted-Pair Receiver

2.3.9 Clock and Data Recovery

2.3.10 Link Integrity and AutoNegotiation

2.3.11 Link Indication

2.3.12 Collision

2.3.13 LED Drivers

Start of Packet

2.4.1 100 Mbits/s

2.4.2 10 Mbits/s

End of Packet

1-1

1-3

2-2

2-3

2-3

2-3

2-8

2-8

2-9

2-12

2-13

2-14

2-14

2-15

2-18

2-21

2-22

2-26

2-26

2-28

2-30

2-30

2-31

2-31

L80227 10BASE-T/100BASE-TX Ethernet PHY Technical Manual

vii

Copyright © 2000, 2001, 2002 by LSI Logic Corporation. All rights reserved.

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