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LPC47U332 Ver la hoja de datos (PDF) - SMSC -> Microchip

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LPC47U332 Datasheet PDF : 252 Pages
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QFP
PIN #
44
NAME
VREF
6 CLKI32
19 CLOCKI
FUNCTION
Reference Voltage (5V or
3.3V)
CLOCK PINS
32.768kHz Standby Clock
Input (Note 3)
14.318MHz Clock Input
BUFFER
TYPE
BUFFER MODE PER
FUNCTION (NOTE 1)
IS
IS
IS
IS
Note: There are no internal pullups on any of the pins in the LPC47U33x.
Note: The "n" as the first letter of a signal name indicates an "Active Low" signal.
Note 1: Buffer Modes per function on multiplexed pins are separated by a slash “/”. Buffer Modes in
parenthesis represent multiple buffer modes for a single pin function.
Note 2: The nLPCPD pin may be tied high. The LPC interface will function properly if the
nPCI_RESET signal follows the protocol defined for the nLRESET signal in the “Low Pin
Count Interface Specification”.
Note 3: If the 32kHz input clock is not used the CLKI32 pin must be grounded. There is a bit in the
configuration register at 0xF0 in Logical Device A that indicates whether or not the 32KHz
clock is connected. This bit determines the clock source for the fan tachometer, LED and
“wake on specific key” logic.
Note 4: The fan control pin FAN comes up as an output and low following a VCC POR and Hard
Reset. This pin powers up as an input on VTR POR and may not be used for wakeup events
under VTR power (VCC=0).
Note 5: VTR can be connected to VCC if no wakeup functionality is required.
Note 6: The GP24/SYSOPT pin requires an external pulldown resistor to put the base IO address for
configuration at 0x02E. An external pullup resistor is required to move the base IO address
for configuration to 0x04E.
Note 7: External pullups must be placed on the nKBDRST and nA20M pins. These pins are GPIOs
that are inputs after an initial power-up (VTR POR). If the nKBDRST and nA20M functions
are to be used, the system must ensure that these pins are high.
Note 8: The LED pins are powered by VTR so that the LEDs can be controlled when the part is under
VTR power.
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