MAX17497A/MAX17497B
AC-DC and DC-DC Peak Current-Mode Converters
with Integrated Step-Down Regulator
Pin Configuration
TOP VIEW
12 11 10 9
RESETN 13
PGNDF 14
LXF 15
MAX17497A
MAX17497B
IN 16
EP
+
1
2
3
4
8 SSF
7 COMPF
6 EAFN
5 SCOMPF
TQFN
Pin Description
PIN
NAME
FUNCTION
Enable/Undervoltage-Lockout Pin. Drive to > 1.23V to start the devices. To externally program the
1
EN/UVLO UVLO threshold of the input supply, connect a resistor-divider between input supply EN/UVLO and
SGND.
2
VCC
Linear Regulator Output. Connect input bypass capacitor of at least 1FF from VCC to SGND as close
as possible to the IC.
3
OVI
Overvoltage Comparator Input. Connect a resistor-divider between the input supply (OVI) and SGND
to set the input overvoltage threshold.
4
RLIMF
Current-Limit Setting Pin. Connect a resistor between RLIMF and SGND to set the peak-current limit
for nonisolated flyback converter. Peak-current limit defaults to 500mA if unconnected.
Slope Compensation Input Pin. Connect a resistor between SCOMPF and SGND to set slope comp
5
SCOMPF ramp. Connect to VCC for minimum slope comp. See the Programming the Slope Compensation for
the Flyback/Boost Converter (SCOMPF) section.
Feedback/Inverting Input of the Error Amplifier for Nonisolated Flyback Converter. Connect to
6
EAFN
midpoint of resistor-divider from the positive terminal of the output capacitor of the flyback/boost
converter to SGND.
7
COMPF
Error-Amplifier Output of Flyback/Boost Converter. Connect the frequency-compensation network
between COMPF and SGND. See Figure 9.
Maxim Integrated
10