MAX2014ETA(2006) Ver la hoja de datos (PDF) - Maxim Integrated

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MAX2014ETA
(Rev.:2006)

50MHz to 1000MHz, 75dB Logarithmic Detector/Controller

Maxim Integrated 

50MHz to 1000MHz, 75dB Logarithmic

Detector/Controller

Controller Mode

The MAX2014 can also be used as a detector/controller

within an AGC loop. Figure 3 depicts one scenario

where the MAX2014 is employed as the controller for a

variable-gain PA. As shown in the figure, the MAX2014

monitors the output of the PA through a directional cou-

pler. An internal integrator (Figure 2) compares the

detected signal with a reference voltage determined by

VSET. The integrator, acting like a comparator, increas-

es or decreases the voltage at OUT, according to how

closely the detected signal level matches the VSET ref-

erence. The MAX2014 adjusts the power of the PA to a

level determined by the voltage applied to SET. With R1 =

0Ω, the controller mode slope is approximately

19mV/dB (RF = 100MHz).

Layout Considerations

As with any RF circuit, the layout of the MAX2014 circuit

affects the device’s performance. Use an abundant num-

ber of ground vias to minimize RF coupling. Place the

input capacitors (C1, C2) and the bypass capacitors

(C3–C6) as close to the IC as possible. Connect the

bypass capacitors to the ground plane with multiple vias.

POWER AMPLIFIER

TRANSMITTER

SET-POINT

DAC

GAIN-CONTROL INPUT

COUPLER

LOGARITHMIC IN

OUT

DETECTOR

SET

20kΩ

20kΩ

MAX2014

Figure 3. System Diagram for Automatic Gain-Control Loop

VS

R4

1 VCC

C6

C5

DETECTORS

OUT 8

VOUT

C1

2 INHI

RFIN

20kΩ SET 7

VSET

C2

3 INLO

20kΩ

6

GND

4 VCC

MAX2014

5

PWDN

C4

C3

Figure 2. Controller-Mode Typical Application Circuit

TOP VIEW

Pin Configuration

OUT SET GND PWDN

8765

MAX2014

1 234

VCC INHI INLO VCC

TDFN

PROCESS: BiCMOS

Chip Information

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