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MAX2112(2007) Ver la hoja de datos (PDF) - Maxim Integrated

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Lista de partido
MAX2112 Datasheet PDF : 19 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Complete, Direct-Conversion
Tuner for DVB-S2 Applications
Pin Description (continued)
PIN
NAME
DESCRIPTION
26
SDA
2-Wire Serial-Data Interface. Requires a 2.7kΩ pullup resistor to VCC.
27
SCL
2-Wire Serial-Clock Interface. Requires a 2.7kΩ pullup resistor to VCC.
28
ADDR Address. Must be connected to either ground (logic 0) or supply (logic 1).
EP
Exposed Paddle. Solder evenly to the board’s ground plane for proper operation.
Detailed Description
Register Description
The MAX2112 includes 12 user-programmable regis-
ters and 2 read-only registers. See Table 1 for register
configurations. The register configuration of Table 1
shows each bit name and the bit usage information for all
registers. Note that all registers must be written after and
no earlier than 100µs after the device is powered up.
Table 1. Register Configuration
MSB
LSB
REG REGISTER READ/ REG
NUMBER NAME WRITE ADDRESS
DATA BYTE
D[7]
D[6]
D[5]
D[4]
D[3]
D[2] D[1] D[0]
1
N-Divider
MSB
Write
0x00
FRAC
1
N[14]
N[13]
N[12]
N[11] N[10] N[9] N[8]
2
N-Divider
LSB
Write
0x01
N[7]
N[6]
N[5]
N[4]
N[3]
N[2] N[1] N[0]
3
Charge Write
0x02
CPMP[1] CPMP[0] CPLIN[1] CPLIN[0]
F[19]
F[18] F[17] F[16]
Pump
0
0
0
0
4
F-Divider Write
0x03
MSB
F[15]
F[14]
F[13]
F[12]
F[11] F[10] F[9] F[8]
5
F-Divider Write
0x04
F[7]
F[6]
F[5]
F[4]
F[3]
F[2] F[1] F[0]
LSB
XTAL
6
Divider Write
0x05
XD[2]
XD[1]
XD[0]
R[4]
R-Divider
R[3]
R[2] R[1] R[0]
7
PLL
Write
0x06
D24
CPS
ICP
X
0
1
X
X
X
X
8
VCO
Write
0x07
VCO[4] VCO[3] VCO[2] VCO[1] VCO[0] VAS ADL ADE
9
LPF
Write
0x08
LP[7]
LP[6]
LP[5]
LP[4]
LP[3] LP[2] LP[1] LP[0]
10
Control Write
0x09
STBY
X
PWDN
X
BBG[3] BBG[2] BBG[1] BBG[0]
11
Shutdown Write
0x0A
X
PLL
DIV
VCO
BB
RFMIX RFVG FE
12
Test
Write
0x0B
CPTST[2] CPTST[1] CPTST[0]
0
0
0
X
TURBO
1
LD LD LD
MUX[2] MUX[1] MUX[0]
0
0
0
13
Status
Byte-1
Read
0x0C
POR
VASA
VASE
LD
X
X
X
X
14
Status
Byte-2
Read
0x0D VCOSBR[4] VCOSBR[3] VCOSBR[2] VCOSBR[1] VCOSBR[0] ADC[2] ADC[1] ADC[0]
X = Don’t care.
0 = Set to 0 for factory-tested operation.
1 = Set to 1 for factory-tested operation.
_______________________________________________________________________________________ 9

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