MAX2160(2005) Ver la hoja de datos (PDF) - Maxim Integrated
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MAX2160 Datasheet PDF : 25 Pages
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ISDB-T Single-Segment Low-IF Tuners
PIN
TQFN
20
22
23
25
26
27
29
32
33
34
35
36
37
38
39
40
EP
—
—
Pin Description (continued)
BUMP NO.
WLP
39
NAME
DESCRIPTION
VCCFLT
DC Power Supply for Baseband Filter Circuits. Connect to a +2.85V low-noise
supply. Bypass to GND with a 100pF capacitor connected as close to the pin as
possible. Do not share capacitor ground vias with other ground connections.
XTAL/TCXO Select. Logic-high enables the TCXO input and disables the XTAL input.
37
ENTCXO Logic-low disables the TCXO input and enables the XTAL input. This pin is internally
pulled up to VCC.
47
GC2
Baseband Gain-Control Input. High-impedance analog input, with a 0.3V to 2.7V
operating range. VGC2 = 0.3V corresponds to the maximum gain setting.
44
IOUT In-Phase Low-IF Output. Requires a DC-blocking capacitor.
—
GNDBB Ground for Baseband Circuits. Connect to the PC board ground plane.
43
QOUT Quadrature Low-IF Output. Requires a DC-blocking capacitor.
DC Power Supply for Baseband Circuits. Connect to a +2.85V low-noise supply.
41
VCCBB Bypass to GND with a 100pF capacitor connected as close to the pin as possible.
Do not share capacitor ground vias with other ground connections.
Internal VCO Bias Bypass. Bypass directly to GNDVCO with a 470nF capacitor
30
VCOBYP connected as close to the pin as possible. Do not share capacitor ground vias with
other ground connections. See the Layout Considerations section.
DC Power Supply for VCO Circuits. Connect to a +2.85V low-noise supply. Bypass
26
VCCVCO directly to GNDVCO with a 100pF capacitor connected as close to the pin as
possible. Do not share capacitor ground vias with other ground connections.
23
GNDVCO VCO Circuit Ground. Connect to the PC board ground plane. See the Layout
Considerations section.
32
VTUNE
High-Impedance VCO Tune Input. Connect the PLL loop filter output directly to this
pin with the shortest connection as possible.
20
GNDTUNE
Ground for VTUNE. Connect to the PC board ground plane. See the Layout
Considerations section.
18
TEST Test Output. Used as a test output for various internal blocks. See Table 2.
16
CPOUT
Charge-Pump Output. Connect this output to the PLL loop filter input with the
shortest connection possible.
DC Power Supply for Charge-Pump Circuits. Connect to a +2.85V low-noise supply.
10
VCCCP Bypass to GND with a 100pF capacitor connected as close to the pin as possible.
Do not share capacitor ground vias with other ground connections.
1
—
3, 6, 8, 13, 15,
27, 31, 40, 42
21
GNDCP
GND
GND
GNDLNA
Charge-Pump Circuit Ground. Connect to the PC board ground plane. See the
Layout Considerations section.
Exposed Paddle. Solder evenly to the board’s ground plane for proper operation.
Ground. Connect to the PC board ground plane.
Ground for LNA. Connect to ground with trace.
10 ______________________________________________________________________________________
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