APU0071-002WE-TY Ver la hoja de datos (PDF) - Anpec Electronics

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APU0071-002WE-TY

80 Segment / 16 Common Controller for Dot Matrix LCD

Anpec Electronics 

APU0071

1-1. Clear Display

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Code 0

0

0

000

0

0

0

1

Clear all the display data by writing “20H” (space code of CGROM) to all DDRAM address, and set

DDRAM address to “00H” into AC (Address Counter) . For this instruction, the CGROM address ”20H” has

to be set to space code. Shifting of the display position returns it to the original position. Namely, when

display data is disappeared and cursor or blinking is displayed, bring the cursor to the left edge on first line

of the display. It makes entry mode to increment (I / D = 1)

1-2. Return Home

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Code 0

0

0

000

0

0

1

∗

" ∗ " : Don't care

Set DDRAM address to ”00H” into the address counter. Shifting of the display position returns it to the

original position. When cursor or blinking is displayed, bring the cursor to the left edge on first line of the

display. The data in DDRAM does not change.

1-3. Entry Mode Set

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Code 0

0

0

000

0

1 I/D S

Set the moving direction of cursor and display.

I / D : Increment / decrement of DDRAM / CGRAM address (cursor or blink)

When I / D = “High”, cursor / blink moves to right and DDRAM address is increased by 1.

When I / D = “Low”, cursor / blink moves to left and DDRAM address is decreased by 1.

S : Shift of entire display

When DDRAM read (CGRAM read / write) operation or S = “Low”, entire display is not shifting.

If S = “High”, and DDRAM write operation, entire display is sifted according to I / D value (I / D = “1” :

shift left, I / D = “0” : shift right) .

Copyright  ANPEC Electronics Corp.

11

Rev. A.07 - FEB., 2002

www.anpec.com.tw

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