M68AR024DN70ZH1T Ver la hoja de datos (PDF) - STMicroelectronics
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M68AR024DN70ZH1T Datasheet PDF : 19 Pages
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M68AR024D
Table 7. Read and Standby Mode AC Characteristics
Symbol
Parameter
M68AR024D
Unit
70
tAVAV
Read Cycle Time
Min
70
ns
tAVQV
Address Valid to Output Valid
Max
70
ns
tAXQX (1) Data hold from address change
Min
5
ns
tBHQZ (2, 3) Upper/Lower Byte Enable High to Output Hi-Z
Max
25
ns
tBLQV
Upper/Lower Byte Enable Low to Output Valid
Max
70
ns
tBLQX (1) Upper/Lower Byte Enable Low to Output Transition
Min
5
ns
tEHQZ (2, 3) Chip Enable High to Output Hi-Z
Max
25
ns
tELQV
Chip Enable Low to Output Valid
Max
70
ns
tELQX (1) Chip Enable Low to Output Transition
Min
5
ns
tGHQZ (2, 3) Output Enable High to Output Hi-Z
Max
25
ns
tGLQV
Output Enable Low to Output Valid
Max
35
ns
tGLQX (1) Output Enable Low to Output Transition
Min
5
ns
tPD (4)
Chip Enable High to Power Down
Max
0
ns
tPU (4)
Chip Enable Low to Power Up
Min
70
ns
Note: 1. Test conditions assume transition timing reference level = 0.3VCCQ to 0.7VCCQ.
2. At any given temperature and voltage condition, tGHQZ is less than tGLQX, tBHQZ is less than tBLQX and tEHQZ is less than tELQX for
any given device.
3. These parameters are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output
voltage levels.
4. Tested initially and after any design or process changes that may affect these parameters.
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