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MAX9312

Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

Maxim Integrated 

Dual 1:5 Differential LVPECL/LVECL/HSTL

Clock and Data Drivers

AC ELECTRICAL CHARACTERISTICS

(VCC - VEE = +2.25V to +3.8V, outputs loaded with 50Ω ±1% to VCC - 2V, input frequency = 1.5GHz, input transition time = 125ps

(20% to 80%), VIHD = VEE + 1.2V to VCC, VILD = VEE to VCC - 0.15V, VIHD - VILD = 0.15V to the smaller of 3V or VCC - VEE, unless oth-

erwise noted. Typical values are at VCC - VEE = 3.3V, VIHD = VCC - 1V, VILD = VCC - 1.5V.) (Note 8)

PARAMETER SYMBOL CONDITIONS

Differential Input-

to-Output Delay

Output-to-Output

Skew (Note 9)

tPLHD, Figure 2

tPHLD

tSKOO

-40°C

+25°C

+85°C

UNITS

MIN TYP MAX MIN TYP MAX MIN TYP MAX

220 321 380 220 312 410 260 322 400

ps

12 46

12 46

10 35

ps

Part-to-Part Skew

(Note 10)

Added Random

Jitter (Note 11)

Added

Deterministic

Jitter (Note 11)

tSKPP

tRJ

fIN = 1.5GHz

clock pattern

fIN = 3.0GHz

clock pattern

3Gbps,

tDJ

223 -1 PRBS pattern

30 160

1.2 2.5

1.2 2.6

80 95

30 190

1.2 2.5

1.2 2.6

80 95

30 140

ps

1.2 2.5

1.2 2.6

ps

(RMS)

80

95

ps

(pk-pk)

Switching

Frequency

VOH - VOL ≥ 300mV,

clock pattern, Figure 2

3.0

fMAX

VOH - VOL ≥ 500mV,

clock pattern, Figure 2

1.5

3.0

1.5

3.0

1.5

GHz

Output Rise/Fall

Time (20% to 80%)

tR, tF

Figure 2

100 112 140 100 116 140 100 121 140

ps

Note 2: Measurements are made with the device in thermal equilibrium.

Note 3: Current into a pin is defined as positive. Current out of a pin is defined as negative.

Note 4: Single-ended input operation using VBB is limited to VCC - VEE = 3.0V to 3.8V for the MAX9312 and VCC - VEE = 2.7V to

3.8V for the MAX9314.

Note 5: DC parameters production tested at TA = +25°C. Guaranteed by design and characterization over the full operating temper-

ature range.

Note 6: Use VBB only for inputs that are on the same device as the VBB reference.

Note 7: All pins open except VCC and VEE.

Note 8: Guaranteed by design and characterization limits are set at ±6 sigma.

Note 9: Measured between outputs on the same part at the signal crossing points for a same-edge transition.

Note 10: Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition.

Note 11: Device jitter added to the input signal.

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