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MC71000

Bluetooth Baseband Controller

Motorola => Freescale 

Architectural Overview

— High-speed UART (up to 2 Mbps)

— High-speed SSI (up to 2 Mbps)

— Dual high-speed SPI (up to 2 Mbps)

• Embedded Memory

— SRAM (64K)

— ROM (256K)

• External Interface Module (EIM)

• JTAG Test Interface Controller (JTIC)

• 32 kHz Oscillator (OSC32k) for Low Power Operation

• Operating Voltage: 1.65 V to 1.95 V

• Package: 100-pin MAPBGA, 7 mm x 7 mm, 0.65 mm ball pitch

4 Architectural Overview

The following sections describe the functionality and performance of the MC71000 Bluetooth Baseband

Controller.

4.1 ARM7 Platform (A7P)

4.1.1 ARM7TDMI

The MC71000 Bluetooth Baseband Controller architecture is based around the 32-bit ARM7TDMI

microprocessor. It is an industry-standard processor recognized for its efficient MIPS/WATT benchmark,

along with excellent code efficiency when working in the 16-bit THUMB mode. The architecture is based

on RISC principles and supports two instruction sets:

• The 32-bit ARM instruction set

• The 16-bit THUMB instruction set

4.2 Memory Sub-System

Program execution in the MC71000 Bluetooth Baseband Controller is predominantly ROM-based, with

internal SRAM being used for code patching. An image can be uploaded from a host system, or a low-cost

serial E2PROM (four-wire connection).

4.2.1 External Interface Module (EIM)

The external interface module (EIM) handles the interface to external devices, as well as generation of chip

selects for external peripherals and memory. It contains a zero-glue interface to external memories

(SRAM, E2PROM, and FLASH chips).

4.3 Peripherals Sub-System

4.3.1 Clock and Reset Module (CRM)

The clock and reset module (CRM) is dedicated to handling all clock, reset, and power management

features in the MC71000 Bluetooth Baseband Controller. It assures that the different clock and reset

signals are stable before they are fed to the internal logic in the MC71000 Bluetooth Baseband Controller.

4

MC71000 Advance Information

MOTOROLA

Preliminary

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