MM1311AD Ver la hoja de datos (PDF) - Mitsumi

Número de pieza

componentes Descripción

Lista de partido

MM1311AD

I2C BUS Control 4-Input 1-Output AV Switch

Mitsumi 

MITSUMI

I2C BUS Control 4-Input 1-Output AV Switch MM1311

Status Register

The status register contains data for sending device status to the master.

Slave address

R/W

Control register

S

A

NA P

1 0 0 1 0 0 0/1 1

b7 b6 b5 b4 b3 b2 b1 b0

Address byte

Control data

The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the

slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 1 when

using as a status register.

The MM1311 slave address can be selected as 91H/93H depending on the status of the ADR pin. When the

ADR pin is low it is 91H. However, the confirmation response after completion of the status register should be

non-acknowledge. The status register output data as shown below.

b7 b6 b5 b4 b3 b2 b1 b0

P-ON

S1 S1 S2 S2

RESET

OPEN SEL OPEN SEL

P-ON RESET : Returns 1 for power on reset. However once data read begins, 0 is returned next.

S1/S2 OPEN : Returns 0 when the S1/S2 pin is not open, and returns 1 when the S1/S2 pin is open

S1/S2 SEL : Returns 0 when the S1/S2 pin is not grounded, and returns 1 when the S1/S2 pin is

grounded.

S1/S2 OPEN, SEL have 3-value discrimination, and the combinations are as shown below.

S1/S2 pin DC voltage

0.8V or less

1.3V or more, 3.5V or less

4.5V or more

S1/S2 OPEN

0

0

1

S1/S2 SEL

1

0

0

Power On Reset

Power on reset is built in to reset each control register to 0 when power is turned on.

Power on reset threshold has hysteresis as shown in the figure below. The IC power on reset status can be

discriminated by reading the status register P-ON RESET.

Reset released

Undefined

Reset status

0.6V 4.3V

5.4V

VCC

Share Link: