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PI74ALVTC16240

16-Bit Buffer/Driver with 3-State Outputs

Pericom Semiconductor Corporation 

PI74ALVTC16240

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Test Circuits and Switching Waveforms

Parameter Measurement Information (VDD = 1.8V - 3.6V)

From Output

Under Test

50pF

CL

(See Note A)

R1

500Ω

RL

500Ω

2 x VDD

Open

GND

Setup, Hold, and Release Timing

Switch Position

Test

tpd

tPLZ/TPZL

tPHZ/TPZH

Pulse Width

S1

Open

2 x VDD

GND

Low-High-Low

Pulse

tW

High-Low-High

Pulse

VDD

VDD/2

0V

VDD

VDD/2

0V

Data

Input

Timing

Input

tSU

tH

VDD

VDD/2

0V

VDD

VDD/2

0V

Propagation Delay

Input

tPLH

Output

Notes:

A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions

such that the output is LOW except when disabled by the

output control.

Waveform 2 is for an output with internal conditions

such that the output is HIGH except when disabled by

the output control.

C. All input pulses are supplied by generators having the

following characteristics: PRR ≤ 10 MHz, ZO = 50Ω,

tr ≤ 2ns, tf ≤ 2ns, measured from 10% to 90%, unless

otherwise specified.

D. The outputs are measured one at a time with one transi-

tion per measurement.

tPHL

Opposite Phase

Input Transition

Enable Disable Timing

Output

Control

(Active LOW)

tPZL

Output

Waveform 1

S1 at 2xVDD

(see Note B) tPZH

Output

Waveform 2

S1 at GND

(see Note B)

tPLZ

VDD

VDD/2

tPHZ

VDD/2

VDD

VDD/2

tPHL

0V

VDD

VDD/2

tPLH

VOL

VDD

VDD/2

0V

VDD

VDD/2

0V

VDD

+0.15V

VOL

-0.15V VOH

0V

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com

8

PS8353A 11/23/98

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