74ABT16646CMTD Ver la hoja de datos (PDF) - Fairchild Semiconductor
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74ABT16646CMTD Datasheet PDF : 9 Pages
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Extended AC Electrical Characteristics
(SSOP Package)
TA = −40°C to +85°C
TA = −40°C to +85°C
TA = −40°C to +85°C
VCC = 4.5V–5.5V
VCC = 4.5V–5.5V
VCC = 4.5V–5.5V
Symbol
Parameter
CL = 50 pF
8 Outputs Switching
CL = 250 pF
1 Output Switching
CL = 250 pF
8 Outputs Switching
Units
(Note 9)
(Note 10)
(Note 11)
Min
Max
Min
Max
Min
Max
tPLH
Propagation Delay
tPHL
Clock to Bus
1.5
5.8
2.0
7.5
2.5
10.0
ns
1.5
5.8
2.0
7.5
2.5
10.0
tPLH
Propagation Delay
tPHL
Bus to Bus
1.5
6.5
2.0
7.0
2.5
9.5
ns
1.5
6.5
2.0
7.0
2.5
9.5
tPLH
Progagation Delay
tPHL
SBAn or SABn to An or Bn
1.5
6.0
2.0
7.5
2.5
10.0
ns
1.5
6.0
2.0
7.5
2.5
10.0
tPZH
Output Enable Time
tPZL
OEn to An or Bn
1.5
6.0
2.0
8.0
2.5
10.5
ns
1.5
6.0
2.0
8.0
2.5
10.5
tPHZ
tPLZ
Output Disable Time
OEn to An or Bn
1.5
6.0
1.5
6.0
(Note 12)
(Note 12)
ns
tPZH
Output Enable Time
tPZL
DIR to An or Bn
1.5
6.5
2.0
8.0
2.5
10.5
ns
1.5
6.5
2.0
8.0
2.5
10.5
tPHZ
tPLZ
Output Disable Time
DIR to An or Bn
1.5
6.5
1.5
6.5
(Note 12)
(Note 12)
ns
Note 9: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 10: This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load capac-
itors in the standard AC load. This specification pertains to single output switching only.
Note 11: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 12: The 3-STATE delays are dominated by the RC network (500Ω, 250 pF) on the output and has been excluded from the datasheet.
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