LTC1605C(RevC) Ver la hoja de datos (PDF) - Linear Technology
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LTC1605C Datasheet PDF : 16 Pages
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LTC1605
PIN FUNCTIONS
on Pin 15 and bit 8 is output on Pin 22. Bit 7 is output on
Pin 6 and the LSB is output on Pin 13.
R/C (Pin 24): Read/Convert Input. With CS low, a falling
edge on R/C puts the internal sample-and-hold into the
hold state and starts a conversion. With CS low, a rising
edge on R/C enables the output data bits.
CS (Pin 25): Chip Select. Internally OR’d with R/C. With
R/C low, a falling edge on CS will initiate a conversion.
With R/C high, a falling edge on CS will enable the output
data.
BUSY (Pin 26): Output Shows Converter Status. It is low
when a conversion is in progress. Data valid on the rising
edge of BUSY. CS or R/C must be high when BUSY rises
or another conversion will start without time for signal
acquisition.
VANA (Pin 27): 5V Analog Supply. Bypass to ground with
a 0.1µF ceramic and a 10µF tantalum capacitor.
VDIG (Pin 28): 5V Digital Supply. Connect directly to Pin
27.
TEST CIRCUITS
Load Circuit for Access Timing
5V
DBN
1k
1k
DBN
CL
CL
A. HI-Z TO VOH AND VOL TO VOH
LTC1605 • TC01
B. HI-Z TO VOL AND VOH TO VOL
W
FUNCTIONAL BLOCK DIAGRA
Load Circuit for Output Float Delay
5V
DBN
1k
50pF
A. VOH TO HI-Z
1k
DBN
50pF
LTC1605 • TC02
B. VOL TO HI-Z
20k
VIN
10k
4k
4k
REF
2.5V REF
CAP
(2.5V)
AGND1
AGND2
DGND
REF BUF
INTERNAL
CLOCK
CSAMPLE
CSAMPLE
ZEROING SWITCHES
VANA
VDIG
16-BIT CAPACITIVE DAC
+
COMP
–
16
SUCCESSIVE APPROXIMATION
REGISTER
CONTROL LOGIC
CS
R/C
BYTE BUSY
OUTPUT LATCHES
•••
D15
D0
LTC1605 • BD
1605fc
7
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