CS5525-AP Ver la hoja de datos (PDF) - Cirrus Logic
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CS5525-AP Datasheet PDF : 29 Pages
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CS5525 CS5526
Offset Register
Register
Reset (R)
MSB
Sign 2-2 2-3 2-4 2-5 2-6
0
0
0
0
0
0
LSB
2-19 2-20 2-21 2-22 2-23 2-24
0
0
0
0
0
0
One LSB represents 2-24 proportion of the input span (bipolar span is 2 times unipolar span)
Offset and data word bits align by MSB (bit MSB-4 of offset register changes bit MSB-4 of data)
Gain Register
Register
Reset (R)
MSB
20
2-1 2-2 2-3 2-4 2-5
1
0
0
0
0
0
LSB
2-18
2-19
2-20
2-21
2-22
2-23
0
0
0
0
0
0
The gain register span is from 0 to (2-2-23). After Reset the MSB = 1, all other bits are 0.
Table 3.
Table 4. Offset and Gain Registers
The offset and gain calibration steps each take one of the modulator are connected together and then
conversion cycle to complete. At the end of the cal- routed to the VREF- pin as shown in Figure 11.
ibration step, the calibration control bits will be set
back to logic 0, and the DF (Done Flag) bit will be
set to a logic 1. For the combination self-calibra-
For self-calibration of gain, the differential inputs
of the modulator are connected to VREF+ and
tion (CC2-CC0= 011; offset followed by gain), the
calibration will take two conversion cycles to com-
plete and will set the DF bit after the gain calibra-
S1
OP EN
tion is completed. The DF bit will be cleared any
A IN +
+
+
time the data register, the offset register, the gain
S2
X 20
C L O SE D
register, or the setup register is read. Reading the
A IN -
-
-
configuration register alone will not clear the DF
bit.
Self Calibration
The CS5525/26 offer both self offset and self gain
calibrations. For the self-calibration of offset in the
25 mV, 55 mV, and 100 mv ranges, the converter
internally ties the inputs of the instrumentation am-
plifier together and routes them to the AIN- pin as
shown in Figure 10. For proper self-calibration of
offset to occur in the 25 mV, 55 mV, and 100 mV
ranges, the AIN- pin must be at the proper com-
mon-mode-voltage (i.e. AIN- = 0V, NBV must be
between -1.8 V to -2.5 V). For self-calibration of
offset in the 1.0 V, 2.5 V, and 5 V ranges, the inputs
Figure 10. Self Calibration of Offset (Low Ranges).
AIN+
AIN-
VREF-
S1
OPEN
+
+
X20
-
-
S2
OPEN
S4
CLOSED
Figure 11. Self Calibration of Offset (High Ranges).
DS202F3
17
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