CS5523-AP Ver la hoja de datos (PDF) - Cirrus Logic

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CS5523-AP

16-Bit or 24-Bit, 2/4/8-Channel ADCs with PGIA

Cirrus Logic 

CS5521/22/23/24/28

2.2.4 Command Register Descriptions

READ/WRITE INDIVIDUAL OFFSET CALIBRATION REGISTER

D7(MSB)

D6

D5

D4

D3

D2

D1

D0

0

CS2

CS1

CS0

R/W

0

0

1

Function:

These commands are used to access each offset register separately. CS1 - CS0 decode the

registers accessed.

R/W (Read/Write)

0

Write to selected register.

1

Read from selected register.

CS[2:0] (Channel Select Bits)

000

Offset Register 1(All devices)

001

Offset Register 2 (All devices)

010

Offset Register 3 (CS5523/24/28 only)

011

Offset Register 4 (CS5523/24/28 only)

100

Offset Register 5 (CS5528 only)

101

Offset Register 6 (CS5528 only)

110

Offset Register 7 (CS5528 only)

111

Offset Register 8 (CS5528 only)

READ/WRITE INDIVIDUAL GAIN REGISTER

D7(MSB)

D6

D5

D4

D3

D2

D1

D0

0

CS2

CS1

CS0

R/W

0

1

0

Function:

These commands are used to access each gain register separately. CS1 - CS0 decode the reg-

isters accessed.

R/W (Read/Write)

0

Write to selected register.

1

Read from selected register.

CS[2:0] (Channel Select Bits)

000

Gain Register 1(All devices)

001

Gain Register 2 (All devices)

010

Gain Register 3 (CS5523/24/28 only)

011

Gain Register 4 (CS5523/24/28 only)

100

Gain Register 5 (CS5528 only)

101

Gain Register 6 (CS5528 only)

110

Gain Register 7 (CS5528 only)

111

Gain Register 8 (CS5528 only)

20

DS317F2

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