V62C2804096L-70B Ver la hoja de datos (PDF) - Mosel Vitelic, Corp

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V62C2804096L-70B

512K X 8, CMOS STATIC RAM

Mosel Vitelic, Corp 

MOSEL VITELIC

Switching Waveforms (Read Cycle)

Read Cycle 1(1, 2, 6)

ADDRESS

OE

I/O

tRC

tAA

tOE

tOLZ

V62C2804096

tOH

tOHZ(5)

Read Cycle 2(1, 2, 4, 6)

tRC

ADDRESS

tAA

tOH

tOH

I/O

Read Cycle 3(1, 3, 4, 6)

ADDRESS

CE1

CE2

I/O

tACS1

tACS2

tCLZ1(5)

tCLZ2(5)

tCHZ(5)

NOTES:

1. WE = VIH.

2. CE1 = VIL and CE2 = VIH.

3. Address valid prior to or coincident with CE1 transition LOW and/or CE2 transition HIGH.

4. OE = VIL.

5. Transition is measured ±500mV from steady state with CL = 5pF. This parameter is guaranteed and not 100% tested.

6. CE2 is offered on BGA package only.

V62C2804096 Rev. 1.0 November 2001

7

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