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GLT5160L16-8TC

16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM

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Function Truth Table [1] [2] (Continued)

Current State

REFRESHING

MODE REGISTER

SETTING

CS RAS CAS WE

Address [3]

Command

H

X

X

XX

DESEL

L

H

H

HX

NOP

L

H

H

LX

TBST

L

H

L

X BA, CA, A[10]

READ / WRITE

L

L

H

H BA, RA

ACT

L

L

H

L BA, A[10]

PRE / PREA

L

L

L

HX

REFA

L

L

L

L Op-Code, Mode-Add MRS

H

XX

XX

DESEL

L

H

H

HX

NOP

L

H

H

LX

TBST

L

H

L

X BA, CA, A[10]

READ / WRITE

L

L

H

H BA, RA

ACT

L

L

H

L BA, A[10]

PRE / PREA

L

L

L

HX

REFA

L

L

L

L Op-Code, Mode-Add MRS

Action [4]

NOP (Idle after tRC)

NOP (Idle after tRC)

ILLEGAL

ILLEGAL

ILLEGAL

ILLEGAL

ILLEGAL

ILLEGAL

NOP (Idle after tRSC)

NOP (Idle after tRSC)

ILLEGAL

ILLEGAL

ILLEGAL

ILLEGAL

ILLEGAL

ILLEGAL

1. H = High Level, L= Low Level, X = Don't Care.

2. All entries assume that CKE was High during the preceding clock cycle and the current clock cycle.

3. BA = Bank Address, RA = Row Address, CA = Column Address, NOP = No OPeration.

4. ILLEGAL = Device operation and/or data-integrity are not guaranteed.

5. ILLEGAL to bank in specified state; function may be legal in the bank indicated by BA, depending on the state of that bank.

6. NOP to bank precharging or in idle state. May precharge bank indicated by BA.

7. ILLEGAL if any bank is not idle.

8. Must satisfy bus contention, bus turn around, write recovery requirements.

6

G-LINK Technology

DEC. 2003 (Rev. 2.4)

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