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CS48DV2B-DQZ(2008) Ver la hoja de datos (PDF) - Cirrus Logic

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CS48DV2B-DQZ Datasheet PDF : 26 Pages
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CS48DV2B Data Sheet
32-bit Audio DSP for Dedicated Dolby Volume and Audistry by Dolby
5. Characteristics and Specifications
Note:
All data sheet minimum and maximum timing parameters are guaranteed over the rated voltage and
temperature. All data sheet typical parameters are measured under the following conditions: T = 25 °C,
CL = 20 pF, VDD = VDDA = 1.8 V, VDDIO = 3.3 V, GNDD = GNDIO = GNDA = 0 V.
5.1 Absolute Maximum Ratings
(GNDD = GNDIO = GNDA = 0 V; all voltages with respect to 0V)
Parameter
Symbol
Min
Max
Unit
DC power supplies:
Core supply VDD
-0.3
2.0
V
PLL supply VDDA
-0.3
I/O supply VDDIO
-0.3
|VDDA – VDDIO|
-
3.6
V
3.6
V
0.3
V
T Input pin current, any pin except supplies
F Input voltage on PLL_REF_RES
Input voltage on I/O pins
A Storage temperature
Iin
-
+/-10
mA
Vfilt
-0.3
3.6
V
Vinio
-0.3
5.0
V
Tstg
-65
150
°C
Caution: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is
R not guaranteed at these extremes.
D 5.2 Recommended Operating Conditions
(GNDD = GNDIO = GNDA = 0 V; all voltages with respect to 0V)
L I DC power supplies:
Parameter
NTIALPH Ambient operating temperature
Symbol Min Typ Max
Unit
Core supply VDD
1.71 1.8 1.89
V
PLL supply VDDA
3.13
3.3 3.46
V
I/O supply VDDIO 3.13 3.3 3.46
V
|VDDA – VDDIO|
0
V
TA
CS48DV2B-CQZ
CS48DV2B-DQZ
-
°C
0
+70
-40
+85
E E Note: It is recommended that the 3.3 V IO supply come up ahead of or simultaneously with the 1.8 V core supply.
ID D 5.3 Digital DC Characteristics
(Measurements performed under static conditions.)
F Parameter
High-level input voltage
N Low-level input voltage, except XTI
Low-level input voltage, XTI
O Input Hysteresis
C High-level output voltage (IO = -2mA), except XTI
Symbol
Min
Typ
VIH
VIL
VILXTI
Vhys
VOH
2.0
-
-
-
-
-
0.4
VDDIO * 0.9 -
Max
-
0.8
0.6
-
Unit
V
V
V
V
V
Low-level output voltage (IO = 2mA), except XTI
VOL
-
- VDDIO * 0.1
V
Input leakage XTI
ILXTI
-
-
5
μA
Input leakage current (all digital pins with internal
ILEAK
-
-
70
μA
pull-up resistors enabled)
10
Copyright 2008 Cirrus Logic
DS875F1
CONFIDENTIAL

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