M61140FP Ver la hoja de datos (PDF) - Renesas Electronics
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M61140FP Datasheet PDF : 28 Pages
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M61140FP
Pin Description
Pin No. Pin name
Function
Circuit Diagram
1
VIDEO DET Video detected output terminal. SIF 33
OUT
trap and SIF B.P.F. are connected to
50
this terminal. Because of open
emitter configuration, an externally
connected drive resistor is
necessary.
1
2
Vreg
Regulated voltage output.
Approximately 3V output.
33
50
2
9 .9K
3
RF AGC
DELAY
4
IF AGC 2
44 IF AGC 1
6 .2K
RF AGC terminal. This terminal
33
combine 4.5MHz SIF signal input
with set up the RF AGC delay point.
The RF AGC delay point is set up by
the DC component of input signal.
AC component is FM detection threw
5 .1 K
the limiter amplifier.
3
40
40p
4 3K
15p
IF AGC 2 terminal
33
IF AGC 2 terminal. External
capacitor effects AGC speed. When
this terminal is grounded, the effect
of VIF amp gain becomes minimum.
4
44
10K 50
2.5K
5
EQ F/B
Equalizer feedback terminal. It is
33
possible to change the frequency
characteristic of the video signal by
attaching L,C,R to this terminal.
500
5
2 .2K
7K
6
OSC GND
OSC ground terminal.
Rev.1.3 Jun 14, 2004 page 4 of 27
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