SST25VF512(2005) Ver la hoja de datos (PDF) - Silicon Storage Technology
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SST25VF512 Datasheet PDF : 23 Pages
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512 Kbit SPI Serial Flash
SST25VF512
TABLE 12: REVISION HISTORY
Number
00 • Initial release
Description
01 • Remove Cycles 6 & 7 for Read and Write operations.
• Swapped Ready#/Busy logic. (1 = busy, 0 = not busy)
• Change WP# description
• Added SPI protocol timing diagram.
• Updated all timing diagrams
• Remove all Reset# pin description.
• Add HOLD# description.
• Updated Transient Voltage parameter.
• Add Auto Address Increment (AAI) feature and description.
• Global layout changes.
• Updated all Instruction descriptions.
02 • Removed 15H and 1DH commands for Read ID
03 • Moved the 2 Mbit and 4 Mbit parts to data sheet S71231
• Moved the 1 Mbit part to data sheet S71233
• Changed AC timing parameter TCES and TCEH timings to 20 ns
• AC timing point corrected in Figure 19
• Added RDSR instruction in Figure 6
• Added System Power-up Timing
• Re-aligned CE# with CLK in Mode 3 for all figures
• Corrected block address range to AMS-A15 in “Block-Erase” on page 10
04 • Removed Industrial temperature parts
• Updated Figures 2, 4 - 14: Aligned SI waveform with rising edge of clock
05 • 2004 Data Book
06 • Added footnote 2 to Table 4 on page 6 (PSN: C0250001)
07 • Added RoHS compliance information on page 1 and in the “Product Ordering Infor-
mation” on page 20
• Updated the surface mount lead temperature from 240°C to 260°C and the time
from 3 seconds to 10 seconds on page 15.
08 • Revised the Absolute Max. Stress Ratings for Surface Mount Solder Reflow Temp.
Data Sheet
Date
May 2001
Jan 2002
Apr 2002
Apr 2003
Aug 2003
Dec 2003
Apr 2004
Jan 2005
Nov 2005
Silicon Storage Technology, Inc. • 1171 Sonora Court • Sunnyvale, CA 94086 • Telephone 408-735-9110 • Fax 408-735-9036
www.SuperFlash.com or www.sst.com
©2005 Silicon Storage Technology, Inc.
23
S71192-08-000
11/05
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