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XRD87L75

Low-Voltage CMOS 8-Bit High-Speed Analog-to-Digital Converter

Exar Corporation 

XRD87L75

APPLICATION NOTES

Signals should not exceed AVDD +0.5V or go below

AGND -0.5V or DVDD +0.5V or DGND -0.5V. All pins

have internal protection diodes that will protect them

from short transients (<100µs) outside the supply

range.

AGND and DGND pins are connected internally through

the P- substrate. DC voltage differences between these

pins will cause undesirable internal substrate currents.

The power supply (AVDD) and reference voltage (VRT &

VRB) pins should be decoupled with 0.1µF and 10µF

capacitors to AGND, placed as close to the chip as

possible.

The digital outputs should not drive long wires or buses.

The capacitive coupling and reflections will contribute

noise to the conversion.

To avoid timing errors, use the rising edge of the sample

clock (CLK) to latch data from the XRD87L75 to other

parts of the system.

The reference can be biased internally by shorting VRT

to VRTS and VRB to VRBS. This will generate 0.4V at VRB

and 1.72V at VRT (see Figure 5.).

If the internal reference pins VRTS and/or VRBS are not

used they should be left unconnected.

1.0

0.8

0.6

0.4

0.2

0.0

-0.2

-0.4

-0.6

-0.8

-1.0

0

Vdd = 3.3V

Vrt = 2.5V

Vrb = 0.5V

Fs = 6MHz

Ta = 25oC

32

64

96

128

160

192

224

256

Code

Graph 1. DNL vs. Code

Rev. 1.00

6

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