datasheetbank_Logo
búsqueda de Hoja de datos y gratuito Fichas de descarga

LPC1549JBD48QL Ver la hoja de datos (PDF) - NXP Semiconductors.

Número de pieza
componentes Descripción
Lista de partido
LPC1549JBD48QL Datasheet PDF : 107 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LPC15xx
32-bit ARM Cortex-M3 microcontroller; up to 256 kB flash and
36 kB SRAM; FS USB, CAN, RTC, SPI, USART, I2C
Rev. 1.1 — 29 April 2015
Product data sheet
1. General description
The LPC15xx are ARM Cortex-M3 based microcontrollers for embedded applications
featuring a rich peripheral set with very low power consumption. The ARM Cortex-M3 is a
next generation core that offers system enhancements such as enhanced debug features
and a higher level of support block integration.
The LPC15xx operate at CPU frequencies of up to 72 MHz. The ARM Cortex-M3 CPU
incorporates a 3-stage pipeline and uses a Harvard architecture with separate local
instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3
CPU also includes an internal prefetch unit that supports speculative branching.
The LPC15xx includes up to 256 kB of flash memory, 32 kB of ROM, a 4 kB EEPROM,
and up to 36 kB of SRAM. The peripheral complement includes one full-speed USB 2.0
device, two SPI interfaces, three USARTs, one Fast-mode Plus I2C-bus interface, one
C_CAN module, PWM/timer subsystem with four configurable, multi-purpose State
Configurable Timers (SCTimer/PWM) with input pre-processing unit, a Real-time clock
module with independent power supply and a dedicated oscillator, two 12-channel/12-bit,
2 Msamples/s ADCs, one 12-bit, 500 kSamples/s DAC, four voltage comparators with
internal voltage reference, and a temperature sensor. A DMA engine can service most
peripherals.
For additional documentation related to the LPC15xx parts, see Section 17 “References”.
2. Features and benefits
System:
ARM Cortex-M3 processor (version r2p1), running at frequencies of up to 72 MHz.
ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
System tick timer.
Serial Wire Debug (SWD) with four breakpoints and two watchpoints.
Single-cycle multiplier supported.
Memory Protection Unit (MPU) included.
Memory:
Up to 256 kB on-chip flash programming memory with 256 Byte page write and
erase.
Up to 36 kB SRAM.
4 kB EEPROM.

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]