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AD8341ACPZ-WP Ver la hoja de datos (PDF) - Analog Devices

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AD8341ACPZ-WP
ADI
Analog Devices ADI
AD8341ACPZ-WP Datasheet PDF : 20 Pages
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AD8341
As the output power drops, the noise floor, measured in dBm in
1 MHz BW at 50 MHz carrier offset, drops slightly.
–30
–50
–35
–55
ACPR 5MHz OFFSET
–40
–60
–45
–65
ACPR 10MHz OFFSET
–50
–70
–55
–75
–60
–80
–65
–85
–70
–90
–75
NOISE –50MHz OFFSET
–80
–30
–25
–20
–15
–10
–5
0
OUTPUT POWER (dBm)
–95
–100
5
Figure 39. AD8341 ACPR and Noise vs. Output Power;
Single-Carrier WCDMA (Test Model 1-64 at 2140 MHz)
Figure 40 shows how output power, ACPR, and noise vary with
the differential I and Q control voltages. VBBI and VBBQ are tied
together and are varied from 0.5 V to 50 mV.
0
–40
OUTPUT POWER dBm
–5
–45
–10
–50
–15
ACPR 5MHz OFFSET
–55
–20
–60
–25
–65
–30
–70
ACPR 10MHz OFFSET
–35
–75
–40
–45
–50
0
NOISE –50MHz OFFSET
0.1
0.2
0.3
0.4
IQ CONTROL VOLTAGE
–80
–85
–90
0.5
Figure 40. AD8341 Output Power, ACPR and Noise vs. VIQ.
Single-Carrier WCDMA (Test Model 1-64 at 2140 MHz)
In this case, adjacent channel power ratio remains constant as
the (noise dominated) alternate channel power degrades
roughly 1-for-1 with output power. As the I and Q control volt-
age drops, the noise floor again drops slowly.
Rev. 0 | Page 16 of 20

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