AD8351ARM Ver la hoja de datos (PDF) - Analog Devices
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AD8351ARM Datasheet PDF : 19 Pages
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AD8351
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
PWUP 1
RGP1 2
INHI 3
INLO 4
RGP2 5
10 VOCM
AD8351
TOP VIEW
(Not to Scale)
9 VPOS
8 OPHI
7 OPLO
6 COMM
RGP1 1
INHI 2
INLO 3
RGP2 4
AD8351
TOP VIEW
(Not to Scale)
12 VPOS
11 OPHI
10 OPLO
9 COMM
Figure 2. 10-Lead MSOP Pin Configuration
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED PAD IS INTERNALLY CONNECTED TO
GND AND MUST BE SOLDERED TO A LOW
IMPEDANCE GROUND PLANE.
Figure 3. 16-Lead LFCSP Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
10-Lead MSOP 16-Lead LFCSP
1
16
2
1
3
2
4
3
5
4
6
9
7
10
8
11
9
12
10
13
5, 6, 7, 8, 14, 15
Mnemonic
PWUP
RGP1
INHI
INLO
RGP2
COMM
OPLO
OPHI
VPOS
VOCM
NC
EPAD
Description
Apply a positive voltage (1.3 V ≤ VPWUP ≤ VPOS) to activate device.
Gain Resistor Input 1.
Balanced Differential Input. Biased to midsupply, typically ac-coupled.
Balanced Differential Input. Biased to midsupply, typically ac-coupled.
Gain Resistor Input 2.
Device Common. Connect to low impedance ground.
Balanced Differential Output. Biased to VOCM, typically ac-coupled.
Balanced Differential Output. Biased to VOCM, typically ac-coupled.
Positive Supply Voltage. 3 V to 5.5 V.
Voltage applied to this pin sets the common-mode voltage at both the input and
output. Typically decoupled to ground with a 0.1 μF capacitor.
No connect. Do not connect to this pin.
Exposed Pad. The exposed pad is internally connected to GND and must be soldered
to a low impedance ground plane.
Rev. D | Page 6 of 19
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