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74ALVT16821DL

20-bit bus-interface D-type flip-flop; positive-edge trigger (3-State)

Philips Electronics 

Philips Semiconductors

2.5V/3.3V 20-bit bus-interface D-type flip-flop;

positive-edge trigger (3-State)

Product specification

74ALVT16821

nOE

VM

VM

3.0V or VCC

whichever

is less

0V

tPZH

tPHZ

VOH

VM

VY

nQx

0V

SH00007

Waveform 3. 3-State Output Enable Time to High Level

and Output Disable Time from High Level

TEST CIRCUIT AND WAVEFORM

nOE

nQx

VM

tPZL

VM

tPLZ

VM

3.0V or VCC

whichever

is less

0V

VX

VOL

3.0V or VCC

0V

SH00008

Waveform 4. 3-State Output Enable Time to Low Level

and Output Disable Time from Low Level

VIN

PULSE

GENERATOR

VCC

D.U.T.

VOUT

6.0V or VCC x 2

90%

Open

NEGATIVE

GND

PULSE

RL

tW

VM

10%

tTHL (tF)

VM

10%

VIN

90%

0V

tTLH (tR)

RT

CL

RL

Test Circuit for 3-State Outputs

SWITCH POSITION

POSITIVE

PULSE

10%

tTLH (tR)

90%

VM

tW

90%

VM

tTHL (tF)

VIN

10%

0V

TEST

tPLZ/tPZL

tPLH/tPHL

tPHZ/tPZH

SWITCH

6V or VCC x 2

Open

GND

DEFINITIONS

RL = Load resistor; see AC CHARACTERISTICS for value.

CL = Load capacitance includes jig and probe capacitance:

See AC CHARACTERISTICS for value.

RT = Termination resistance should be equal to ZOUT of

pulse generators.

INPUT PULSE REQUIREMENTS

FAMILY

Amplitude Rep. Rate tW

tR

tF

3.0V or VCC

74ALVT16 whichever v10MHz

is less

500ns v2.5ns v2.5ns

SW00025

1998 Feb 13

9

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