W83195AR-25 Ver la hoja de datos (PDF) - Winbond
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W83195AR-25 Datasheet PDF : 16 Pages
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W83195AR-25
6.4 Register 3: PCI Clock Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7
1
20 PCICLK7 (Active / Inactive)
6
1
19 PCICLK6 (Active / Inactive)
5
1
17 PCICLK5 (Active / Inactive)
4
1
16 PCICLK4 (Active / Inactive)
3
1
15 PCICLK3 (Active / Inactive)
2
1
13 PCICLK2 (Active / Inactive)
1
1
12 PCICLK1 (Active / Inactive)
0
1
11 PCICLK0 (Active / Inactive)
PRELIMINARY
6.5 Register 4: Additional Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7
1
- Reserved
6
1
7 3V66_0(Active / Inactive)
5
1
8 3V66_1(Active / Inactive)
4
X
- FS4#
3
1
46 IOAPIC (Active / Inactive)
2
X
- FS1#
1
1
43 CPUCLK1(Active / Inactive)
0
1
44 CPUCLK0(Active / Inactive)
6.6 Register 5: SDRAM Clock Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7
1
- SKEW2(SDRAM to CPU Skew programming bit)
6
0
- SKEW1(SDRAM to CPU Skew programming bit)
5
0
- SKEW0(SDRAM to CPU Skew programming bit)
4
1
38 SDRAM_F (Active / Inactive)
3
1
26 SDRAM11 (Active / Inactive)
2
1
27 SDRAM10 (Active / Inactive)
1
1
30 SDRAM9 (Active / Inactive)
0
1
31 SDRAM8 (Active / Inactive)
Publication Release Date: Jan. 2000
-9-
Revision 0.40
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