Philips Semiconductors
2-input NAND gate
Product specification
74AHC2G00; 74AHCT2G00
Type 74AHCT2G00
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
CONDITIONS
OTHER
Tamb = 25 °C
VIH
VIL
VOH
VOL
ILI
ICC
∆ICC
CI
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
LOW-level output voltage
input leakage current
quiescent supply current
additional quiescent supply
current per input pin
input capacitance
VI = VIH or VIL
IO = −50 µA
IO = −8.0 mA
VI = VIH or VIL
IO = 50 µA
IO = 8.0 mA
VI = VIH or VIL
VI = VCC or GND; IO = 0
VI = 3.4 V; other inputs at
VCC or GND; IO = 0
Tamb = −40 to +85 °C
VIH
VIL
VOH
VOL
ILI
ICC
∆ICC
CI
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
LOW-level output voltage
input leakage current
quiescent supply current
additional quiescent supply
current per input pin
input capacitance
VI = VIH or VIL
IO = −50 µA
IO = −8.0 mA
VI = VIH or VIL
IO = 50 µA
IO = 8.0 mA
VI = VIH or VIL
VI = VCC or GND; IO = 0
VI = 3.4 V; other inputs at
VCC or GND; IO = 0
VCC (V)
4.5 to 5.5
4.5 to 5.5
4.5
4.5
4.5
4.5
5.5
5.5
5.5
4.5 to 5.5
4.5 to 5.5
4.5
4.5
4.5
4.5
5.5
5.5
5.5
−
MIN. TYP. MAX. UNIT
2.0 −
−
−
−
V
0.8 V
4.4 4.5 −
V
3.94 −
−
V
−
0
−
−
−
−
−
−
−
−
0.1 V
0.36 V
0.1 µA
1.0 µA
1.35 mA
−
1.5 10
pF
2.0 −
−
−
4.4 −
3.8 −
−
−
−
−
−
−
−
−
−
−
−
−
−
V
0.8 V
−
V
−
V
0.1 V
0.44 V
1.0 µA
10
µA
1.5 mA
10
pF
2004 Jan 21
9