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74ALVC00

Quad 2-input NAND gate

Philips Electronics 

Philips Semiconductors

Quad 2-input NAND gate

Product specification

74ALVC00

DC CHARACTERISTICS

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

SYMBOL

PARAMETER

TEST CONDITIONS

OTHER

VCC (V)

MIN. TYP.(1) MAX. UNIT

Tamb = −40 to +85 °C

VIH

HIGH-level input voltage

1.65 to 1.95 0.65 × VCC −

−

V

2.3 to 2.7 1.7

−

−

V

2.7 to 3.6 2

−

−

V

VIL

LOW-level input voltage

1.65 to 1.95 −

2.3 to 2.7 −

−

0.35 × VCC V

−

0.7

V

2.7 to 3.6 −

−

0.8

V

VOL

LOW-level output voltage VI = VIH or VIL

IO = 100 µA

1.65 to 3.6 −

−

0.2

V

IO = 6 mA

1.65

−

0.11 0.3

V

IO = 12 mA

2.3

−

0.17 0.4

V

IO = 18 mA

2.3

−

0.25 0.6

V

IO = 12 mA

2.7

−

0.16 0.4

V

IO = 18 mA

3.0

−

0.23 0.4

V

IO = 24 mA

3.0

−

0.30 0.55

V

VOH

HIGH-level output voltage VI = VIH or VIL

IO = −100 µA

1.65 to 3.6 VCC − 0.2 −

−

V

IO = −6 mA

1.65

1.25

1.51 −

V

IO = −12 mA

2.3

1.8

2.10 −

V

IO = −18 mA

2.3

1.7

2.01 −

V

IO = −12 mA

2.7

2.2

2.53 −

V

IO = −18 mA

3.0

2.4

2.76 −

V

IO = −24 mA

3.0

2.2

2.68 −

V

ILI

input leakage current

VI = 3.6 V or GND

3.6

−

±0.1 ±5

µA

Ioff

power OFF leakage

VI or VO = 3.6 V

0.0

−

current

±0.1 ±10

µA

ICC

∆ICC

quiescent supply current

additional quiescent

supply current per input

pin

VI = VCC or GND;

IO = 0

VI = VCC − 0.6 V;

IO = 0

3.6

−

3.0 to 3.6 −

0.2 20

µA

5

750

µA

Note

1. All typical values are measured at Tamb = 25 °C.

2003 May 14

6

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