74HCT595 Ver la hoja de datos (PDF) - Diodes Incorporated.
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74HCT595 Datasheet PDF : 11 Pages
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Functional Description and Timing Diagram
74HCT595
Control
SHCP STCP OE MR
X
X
L
L
X
↑
L
L
X
X
H
L
Input
DS
↑
X
L
H
X
↑
L
H
↑
↑
L
H
H=HIGH voltage state
L=LOW voltage state
↑=LOW to HIGH transition
X= don’t care – high or low (not floating)
NC= No change
Z= high-impedance state
Output
Q7S
Qn
L
NC
L
L
L
Z
Q6S
NC
NC
Q6S
QnS
QnS
Function
Low-level asserted on MR clears shift register
Storage register is unchanged
Empty shift register transferred to storage register
Shift register remains clear; All Q ouputs in Z state
HIGH is shifted into first stage of Shift Register Contents of each
register shifted to next register
The content of Q6S has been shifted to Q7S and now appears on
device pin Q7S
Contents of shift register copied to storage register
With output now in active state, the storage resister contents
appear on Q outputs
Contents of shift register copied to output register then shift register
shifted.
74HCT595
Document number: DS35493 Rev. 3 - 2
3 of 11
www.diodes.com
July 2013
© Diodes Incorporated
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