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74LS298

Quad 2-Port Register Multiplexer with Storage

Fairchild Semiconductor 

Functional Description

This device is a high speed quad 2-port register. It selects four bits of data from two sources (ports) under the control of a

Common Select input (S). The selected data is transferred to the 4-bit output register synchronous with the HIGH-to-LOW

transition of the Clock input (CP). The 4-bit output register is fully edge-triggered. The Data inputs (Inx) and Select input (S)

need be stable only one setup time prior to the HIGH-to-LOW transition of the clock for predictable operation.

Logic Diagram

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