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74LVC3G34DC

Triple buffer gate

Philips Electronics 

Philips Semiconductors

74LVC3G34

Triple buffer gate

VCC

VI

PULSE

GENERATOR

VO

D.U.T.

RT

VEXT

RL

CL

RL

mna616

Fig 6.

Test data is given in Table 11.

Definitions for test circuit:

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

CL = Load capacitance including jig and probe capacitance.

RL = Load resistor.

Load circuitry for switching times

Table 11: Test data

Supply voltage Input

VCC

1.65 V to 1.95 V

2.3 V to 2.7 V

2.7 V

VI

VCC

VCC

2.7 V

3.0 V to 3.6 V

2.7 V

4.5 V to 5.5 V

VCC

tr, tf

≤ 2.0 ns

≤ 2.0 ns

≤ 2.5 ns

≤ 2.5 ns

≤ 2.5 ns

Load

CL

30 pF

30 pF

50 pF

50 pF

50 pF

RL

1 kΩ

500 Ω

500 Ω

500 Ω

500 Ω

VEXT

tPLH, tPHL

open

open

open

open

open

9397 750 14545

Product data sheet

Rev. 03 — 31 January 2005

© Koninklijke Philips Electronics N.V. 2005. All rights reserved.

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