A25L40PTQ-50UF Ver la hoja de datos (PDF) - AMIC Technology
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A25L40PTQ-50UF Datasheet PDF : 38 Pages
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Table 13. AC Characteristics
Symbol
Alt.
Parameter
fC
fC
Clock Frequency for the following instructions: FAST_READ,
PP, SE, BE, DP, RES, RDID, WREN, WRDI, RDSR, WRSR
fR
tCH 1
tCL 1
tCLCH 2
tCHCL 2
tSLCH
Clock Frequency for READ instructions
tCLH Clock High Time
tCLL Clock Low Time
Clock Rise Time3 (peak to peak)
Clock Fall Time3 (peak to peak)
tCSS
S Active Setup Time (relative to C)
tCHSL
S Not Active Hold Time (relative to C)
tDVCH
tCHDX
tCHSH
tDSU Data In Setup Time
tDH
Data In Hold Time
S Active Hold Time (relative to C)
tSHCH
S Not Active Setup Time (relative to C)
tSHSL
tSHQZ 2
tCLQV
tCLQX
tHLCH
tCSH
S Deselect Time
tDIS Output Disable Time
tV
Clock Low to Output Valid
tHO
Output Hold Time
HOLD Setup Time (relative to C)
tCHHH
HOLD Hold Time (relative to C)
tHHCH
tCHHL
tHHQX 2
tHLQZ 2
tWHSL 4
tSHWL 4
tDP 2
tRES1 2
tRES2 2
HOLD Setup Time (relative to C)
HOLD Hold Time (relative to C)
tLZ
HOLD to Output Low-Z
tHZ
HOLD to Output High-Z
Write Protect Setup Time
Write Protect Hold Time
S High to Deep Power-down Mode
S High to Standby Mode without Electronic Signature Read
S High to Standby Mode with Electronic Signature Read
tW
Write Status Register Cycle Time
tpp
Page Program Cycle Time
tSE
Sector Erase Cycle Time
tBE
Bulk Erase Cycle Time
Note: 1. tCH + tCL must be greater than or equal to 1/ fC
2. Value guaranteed by characterization, not 100% tested in production.
3. Expressed as a slew-rate.
4. Only applicable as a constraint for a WRSR instruction when SRWD is set at 1.
5. VCC range 3.0V~3.6V for 85MHz.
Min.
D.C.
D.C.
6
5
0.1
0.1
5
5
5
5
5
5
100
0
5
5
5
5
20
100
A25L40P Series
Typ.
Max.
75/85 5
Unit
MHz
50
MHz
ns
ns
V/ns
V/ns
ns
ns
ns
ns
ns
ns
ns
8
ns
8
ns
ns
ns
ns
ns
ns
8
ns
8
ns
ns
ns
3
µs
30
µs
30
µs
100
300
ms
3
5
ms
1
3
s
6
12
s
PRELIMINARY (May, 2007, Version 0.4)
28
AMIC Technology Corp.
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