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A25L512-MF Ver la hoja de datos (PDF) - AMIC Technology

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A25L512-MF
AMICC
AMIC Technology AMICC
A25L512-MF Datasheet PDF : 41 Pages
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SIGNAL DESCRIPTION
Serial Data Output (DO). This output signal is used to
transfer data serially out of the device. Data is shifted out on
the falling edge of Serial Clock (C).
The DO pin is also used as an input pin when the Fast Read
Dual Input-Output instruction and Dual Input Fast Program is
executed.
Serial Data Input (DIO). This input signal is used to transfer
data serially into the device. It receives instructions,
addresses, and the data to be programmed. Values are
latched on the rising edge of Serial Clock (C).
The DIO pin is also used as an output pin when the Fast
Read Dual Output instruction and the Fast Read Dual
Input-Output instruction are executed.
Serial Clock (C). This input signal provides the timing of the
serial interface. Instructions, addresses, or data present at
Serial Data Input (DIO) are latched on the rising edge of
Serial Clock (C). Data on Serial Data Output (DO) changes
after the falling edge of Serial Clock (C).
Chip Select ( S ). When this input signal is High, the device
is deselected and Serial Data Output (DO) is at high
A25L016 Series
impedance. Unless an internal Program, Erase or Write
Status Register cycle is in progress, the device will be in the
Standby mode (this is not the Deep Power-down mode).
Driving Chip Select ( S ) Low enables the device, placing it in
the active power mode.
After Power-up, a falling edge on Chip Select ( S ) is required
prior to the start of any instruction.
Hold (HOLD ). The Hold ( HOLD ) signal is used to pause
any serial communications with the device without
deselecting the device.
During the Hold condition, the Serial Data Output (DO) is
high impedance, and Serial Data Input (DIO) and Serial
Clock (C) are Don’t Care. To start the Hold condition, the
device must be selected, with Chip Select ( S ) driven Low.
Write Protect ( W ). The main purpose of this input signal is
to freeze the size of the area of memory that is protected
against program or erase instructions (as specified by the
values in the BP2, BP1, and BP0 bits of the Status Register).
(April, 2008, Version 0.0)
3
AMIC Technology Corp.

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