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A29DL323
(Rev.:2002)

32M-Bit CMOS Low Voltage Dual Operation Flash Memory 4M-Byte by 8-Bit (Byte Mode) / 2M-Word by 16-Bit (Word Mode)

AMIC Technology 

A29DL323 Series

Extra One Time Protect Sector Erase

To erase the Extra One Time Protect Sector area, write the

Extra One Time Protect Sector erase command sequence in

the Extra One Time Protect Sector mode. This command is

the same as the conventional sector erase command except

that it must be written in the Extra One Time Protect Sector

mode. Therefore, completion of execution of this command is

detected in the same manner as the conventional detection

method of using I/O7 data polling, I/O6 toggle bit, and

RY/ BY . Care must be exercised in selecting a sector

address to erase. If a sector address other than the one in

the Extra One Time Protect Sector area is selected, the data

of that sector is changed.

Extra One Time Protect Sector Protection

The following write operations are used to protect the Extra

One Time Protect area during the Extra One Time Protect

Sector mode.

Write the sector group protection setup command (60H) in

the Extra One Time Protect Sector mode.

. Set (A6, A1, A0) = (VIL, VIH, VIL), and set the sector address

that selects the Extra One Time Protect Sector.

. Write the sector group protection command (60H).

Because the sequence is the same as the conventional

command sequence to protect a sector group except that the

Extra One Time Protect Sector mode must be set and that

VID is not input to the RESET , the same command

sequence can be used.

For details of how to protect a sector group, refer to Sector

Group Protection.

If an address other than the one of the Extra One Time

Protect Sector area is specified as a sector address, the

other sectors are affected. Once the sector has been

protected, protection can never be canceled. Exercise utmost

care when protecting a sector.

Hardware Data Protection

This device requires two unlock cycles for program / erase

command sequence to prevent illegal program / erase.

Moreover, a hardware data protect function is provided as

follows.

Low VCC Write Inhibit

To prevent an illegal write cycle during VCC transition, the

command register and program / erase circuit is disabled and

all write cycles are ignored while VCC is VLKO or lower. Write

commands are ignored until VCC becomes equal to or

greater than VLKO.

Logical Inhibit

The write cycle is inhibited under any of the following

conditions : OE = VIL, CE = VIH, or WE = VIH. To start a

write cycle, CE = VIL and WE = VIL must be set while /OE =

VIH.

Power-Up Write Inhibit

Even if WE = CE = VIL and OE = VIH are satisfied at

power-up, no commands are accepted at the rising edge of

WE . The device is automatically reset to the read mode at

power ON.

Write Pulse "Glitch" Protection

Because OE , CE , and /WE reject a noise pulse of 5 ns

(typical) or less as an invalid pulse, a write operation is not

started.

Sector Group Protection

The dual operation flash memory can be protected by the

user in sector group units. For details, refer to Sector Group

Protection.

PRELIMINARY (May, 2002, Version 0.0)

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AMIC Technology, Inc.

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