A43L0616AV-55 Ver la hoja de datos (PDF) - AMIC Technology

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A43L0616AV-55

512K X 16 Bit X 2 Banks Synchronous DRAM

AMIC Technology 

Read & Write Cycle with Auto Precharge I @Burst Length=4

A43L0616A

0

CLOCK

CKE

CS

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18 19

High

RAS

CAS

ADDR

RAa

RBb CAa

CBb

BA

A10/AP

RAa

RBb

WE

DQM

DQ

(CL=2)

DQ

(CL=3)

QAa0 QAa1 QAa2 QAa3

DBb0 DBb1 DBb2 DBb3

QAa0 QAa1 QAa2 QAa3

DBb0 DBb1 DBb2 DBb3

Row Active

(A-Bank)

Read with

Auto Precharge

(A-Bank)

Row Active

(B-Bank)

Auto Precharge

Start Point

(A-Bank)

Write with

Auto Precharge

(B-Bank)

*Note : tRCD should be controlled to meet minimum tRAS before internal precharge start.

(In the case of Burst Length=1 & 2, BRSW mode)

Auto Precharge

Start Point

(B-Bank)

: Don't care

(May, 2001, Version 1.0)

30

AMIC Technology, Inc.

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