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A43L0632

512K X 32 Bit X 2 Banks Synchronous DRAM

AMIC Technology 

AC Operating Test Conditions

(VDD = 3.3V ±0.3V, TA = 0°C to +70°C for commercial or TA = -40ºC to +85ºC for extended)

Parameter

AC input levels

Input timing measurement reference level

Input rise and all time (See note3)

Output timing measurement reference level

Output load condition

Value

VIH/VIL = 2.4V/0.4V

1.4V

tr/tf = 1ns/1ns

1.4V

See Fig.2

Output

870Ω

3.3V

1200Ω

VOH(DC) = 2.4V, IOH = -2mA

VOL(DC) = 0.4V, IOL = 2mA

30pF

OUTPUT

ZO=50Ω

A43L0632

VTT =1.4V

50Ω

30pF

(Fig. 1) DC Output Load Circuit

(Fig. 2) AC Output Load Circuit

AC Characteristics

(AC operating conditions unless otherwise noted)

Symbol

Parameter

tCC

CLK cycle time

tSAC

CLK to valid

Output delay

tOH

Output data hold time

tCH

CLK high pulse width

tCL

CLK low pulse width

tSS

Input setup time

tSH

Input hold time

tSLZ

CLK to output in Low-Z

tSHZ

CLK to output in Hi-Z

CL=CAS Latency.

CL=3

CL=2

CL=3

CL=2

CL=3

CL=2

CL=3

CL=2

CL=3

CL=2

CL=3

CL=2

-6

Min

Max

-7

Min

Max

Unit Note

6

7

1000

1000

ns

1

10

10

-

5

-

6

ns

1,2

-

6

-

6

2.5

-

3

-

ns

2

2.5

-

3

-

ns

3

2.5

-

3

-

2.5

-

3

-

ns

3

2.5

-

3

-

1.5

-

2

-

ns

3

1.5

-

2

-

1

-

1

-

ns

3

1

-

1

-

ns

2

-

5

-

6

ns

-

6

-

6

*All AC parameters are measured from half to half.

Note : 1. Parameters depend on programmed CAS latency.

2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.

3. Assumed input rise and fall time (tr & tf) = 1ns.

If tr & tf is longer than 1ns, transient time compensation should be considered,

i.e., [(tr + tf)/2-1]ns should be added to the parameter.

PRELIMINARY (February, 2007, Version 0.1)

6

AMIC Technology, Corp.

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