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A43L8316

128K X 16 Bit X 2 Banks Synchronous DRAM

AMIC Technology 

A43L8316

DC Electrical Characteristics

(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)

Symbol

Parameter

Test Conditions

Icc1

Icc2 P

Icc2 PS

Operating Current Burst Length = 1

(One Bank Active) tRC ≥ tRC(min), tCC ≥ tCC(min), IOL =

0mA

Precharge Standby CKE ≤ VIL(max), tCC = 15ns

Current in power-

down mode

CKL ≤ VIL(max), tCC = ∞

CAS

Latency

3

2

Speed

-7 -8 -10

110 100 90

120 100 90

Unit Notes

mA 1

3

3

3

mA

2

2

2

ICC2N

ICC2NS

Precharge Standby

Current in non

power-down mode

CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns

Input signals are changed one time during 30ns

CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

Input signals are stable.

ICC3 P

ICC3 PS

Active Standby

Current in power-

down mode

CKE ≤ VIL(max), tCC = 15ns

CKE ≤ VIL(max), CKE ≤ VIL(max) tCC = ∞

25 25 25

mA

6

6

6

3

3

3

mA

2

2

2

ICC3N

ICC3NS

Active Standby

current in non

power-down mode

(One Bank Active)

CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 15ns

Input signals are changed one time during 30ns

CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

Input signals are stable.

30 30 30

mA

10 10 10

ICC4

Operating Current IOL = 0mA, Page Burst

(Burst Mode)

All bank Activated, tCCD = tCCD (min)

3

160 150 140

mA 1

2

120 110 100

ICC5 Refresh Current

tRC ≥ tRC (min)

3

90 90

85 mA

2

2

100 90 85

ICC6 Self Refresh

Current

CKE ≤ 0.2V

2

2

2 mA

Note: 1. Measured with outputs open. Addresses are changed only one time during tCC(min).

2. Refresh period is 64ms. Addresses are changed only one time during tCC(min).

Preliminary (April, 2000, Version 1.0)

5

AMIC Technology, Inc.

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