A45L9332AF Ver la hoja de datos (PDF) - AMIC Technology
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A45L9332AF Datasheet PDF : 55 Pages
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3. CAS Interrupt (I)
1) Read intreupted by Read (BL=4) Note 1
CKL
CMD
ADD
DQ(CL2)
DQ(CL3)
RD RD
AB
QA0 QB0 QB1 QB2 QB3
tCCD
Note2
QA0 QB0 QB1 QB2 QB3
A45L9332A Series
2) Write interrupted by (Block) Write (BL =2)
CKL
CMD
ADD
DQ
WR WR
tCCD Note2
AB
DA0 DB0
tCDL
Note3
DB1
WR BW
tCCD Note2
CD
Note4
DC0 Pixel
tCDL
Note3
2) Block Write to Block Write
CKL
CMD
BW BW
ADD
DQ
AB
Note4
Pixel Pixel
tBWC
Note5
3) Write interrupted by Read (BL =2)
DQ(CL2)
DQ(CL3)
WR RD
tCCD Note2
AB
DA0
DA0
tCDL
Note3
QB0 Pixel
QB0 QB1
Note : 1. By “Interrupt”, It is possible to stop burst read/write by external command before the end of burst.
By “ CAS Interrupt”, to stop burst read/write by CAS access; read, write and block write.
2. tCCD : CAS to CAS delay. (=1CLK)
3. tCDL : Last data in to new column address delay. ( = 1CLK).
4. Pixel : Pixel mask.
5. tBWC : Block write minimum cycle time.
PRELIMINARY (October, 2001, Version 0.1)
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AMIC Technology, Inc.
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