A49LF040TL-33FC Ver la hoja de datos (PDF) - AMIC Technology
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A49LF040TL-33FC Datasheet PDF : 31 Pages
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A49LF040
Table 18: LPC Mode Interface AC Input/Output Characteristics
Symbol Parameter
Test Conditions
Min
Max
IOH (AC) Switching Current High
(Test Point)
IOL (AC) Switching Current Low
ICL
ICH
slewr
slewf
(Test Point)
Low Clamp Current
High Clamp Current
Output Rise Slew Rate
Output Fall Slew Rate
0 < VOUT ≤ 0.3VDD
0.3VDD < VOUT ≤ 0.9VDD
0.7VDD < VOUT ≤ VDD
VOUT = 0.7VDD
VDD > VOUT ≥ 0.6VDD
0.6VDD > VOUT > 0.1VDD
0.18VDD > VOUT > 0
VOUT=0.18VDD
-3 < VIN ≤ -1
VDD+4 > VIN > VDD+1
0.2VDD-0.6VDD load
0.6VDD-0.2VDD load
Notes:
1. See PCI specification.
2. PCI specification output load is used.
-12 VDD
-17.1(VDD-VOUT)
16VDD
26.7VOUT
-25+(VIN+1)/0.015
25+(VIN-VDD-1)/0.015
1
1
Equation C
-32 VDD
Equation D
38VDD
4
4
Table 19: LPC Mode Interface Reset Timing Parameters, VDD=3.0-3.6V
Symbol Parameter
Min
Max
TPRST
TKRST
TRSTP
TRSTF
TRST(1)
TRSTE
VDD Stable to Reset Low
Clock Stable to Reset Low
RST# Pulse Width
RST# Low to Output Float
RST# High to LFRAME# Low
RST# Low to Reset During Erase or Program
RST# or INIT# Slew Rate
1
100
100
48
1
10
50
Notes:
1. There will be a latency of TRSTE if a reset procedure is performed during a Program or Erase operation.
Figure 7: Reset Timing Diagram
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
V/ns
V/ns
Units
ms
µs
ns
ns
µs
µs
mV/ns
VDD
LCLK
RST#/INIT#
LAD[3:0]
LFRAME#
TPRST
TKRST
TRSTF
TRSTP
TRSTE
TRST
Program or Erase
Operation Aborted
PRELIMINARY (August, 2004, Version 0.1)
17
AMIC Technology, Corp.
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