Figure 14: A/A Mux Mode Byte Program Timing Diagram
Four-Byte Byte Program Command Sequence
Address
5555
2AAA
5555
PA
R/C#
OE#
TWP TWPH
WE#
High-Z
I/O7-I/O0
AA
55
A0
PD
A49LF040
TBP
Byte Program Command Input
PA = Byte Program Address
PD = Byte Program Data
Byte Program Operation In Progress
Figure 15: A/A Mux Mode Block Erase Timing Diagram
Six-Byte Block Erase Command Sequence
Address
5555
2AAA
5555
5555
2AAA
BA
R/C#
OE#
TWP TWPH
TBE
WE#
High-Z
I/O7-I/O0
AA
55
80
AA
55
30/50
BA = Block Address
Block Erase Command Input
Block Erase Operation In Progress
PRELIMINARY (August, 2004, Version 0.1)
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AMIC Technology, Corp.