A49LF040ATX-33F Ver la hoja de datos (PDF) - AMIC Technology
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A49LF040ATX-33F Datasheet PDF : 32 Pages
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A49LF040A
A/A MUX MODE AC CHARACTERISTICS
Table 20: Read Cycle Timing Parameters VDD=3.0-3.6V
Symbol
TRC
TRST
TAS
TAH
TAA
TOE
TOLZ
TOHZ
TOH
Parameter
Read Cycle Time
RST High to Row Address Setup
R/C Address Set-up Time
R/C Address Hold Time
Address Access Time
Output Enable Access Time
OE Low to Active Output
OE High to High-Z Output
Output Hold from Address Change
Min
Max
270
1
45
45
120
60
0
35
0
Table 21: Program/Erase Cycle Timing Parameters, VDD=3.0-3.6V
Symbol
Parameter
Min
Max
TRST
TAS
TAH
TCWH
TOES
TOEH
TOEP
TOET
TWP
TWPH
TDS
TDH
TIDA
TBP
TBE
TSCE
RST High to Row Address Setup
R/C Address Setup Time
R/C Address Hold Time
R/C to Write Enable High Time
OE High Setup Time
OE High Hold Time
OE to Data Polling Delay
OE to Toggle Bit Delay
WE Pulse Width
WE Pulse Width High
Data Setup Time
Data Hold Time
Product ID Access and Exit Time
Byte Programming Time
Block Erase Time
Chip Erase Time
1
50
50
50
20
20
40
40
100
100
50
5
150
300
8
10
Table 22: Reset Timing Parameters, VDD=3.0-3.6V
Symbol Parameter
Min
Max
TPRST VDD Stable to Reset Low
1
TRSTP RST Pulse Width
100
TRSTF
TRST(1)
RST Low to Output Float
RST High to LFRAME Low
48
1
TRSTE RST Low to Reset During Erase or Program
10
Notes:
1. There will be a reset latency of TRSTE if a reset procedure is performed during a Program or Erase operation.
Units
ns
µs
ns
ns
ns
ns
ns
ns
ns
Units
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
s
s
Units
ms
ns
ns
µs
µs
PRELIMINARY (March, 2006, Version 0.1)
20
AMIC Technology, Corp.
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