![](/html/AMICC/255612/page23.png)
Figure 12: A/A Mux Mode Data Polling Timing Diagram
Address
R/C
Row
Address
Column
Address
WE
OE
High-Z
I/O7
Data
In
Final Input Command
Row
Address
Column
Address
Row
Address
Column
Address
TOEP
Data#
Status Bit
Data#
Status Bit
Command Input
Write Operation In
Progress
A49LF040A
Row
Address
Column
Address
Data
Data
Write Operation
Complete
Figure 13: A/A Mux Mode Toggle Bit Timing Diagram
Address
R/C
Row
Address
Column
Address
WE
OE
High-Z
I/O6
Data
In
Final Input Command
Row
Address
Column
Address
Row
Address
Column
Address
TOET
Status Bit
Status Bit
Command Input
Write Operation In
Progress
Row
Address
Column
Address
Data
Data
Write Operation
Complete
PRELIMINARY (March, 2006, Version 0.1)
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AMIC Technology, Corp.